IBIS Macromodel Task Group Meeting date: 05 March 2019 Members (asterisk for those attending): ANSYS: Dan Dvorscak * Curtis Clark Cadence Design Systems: * Ambrish Varma Brad Brim Kumar Keshavan Ken Willis eASIC: David Banas GlobalFoundries: Steve Parker IBM Luis Armenta Trevor Timpane Intel: Michael Mirmak Keysight Technologies: Fangyi Rao * Radek Biernacki Ming Yan Stephen Slater Maziar Farahmand Mentor, A Siemens Business: John Angulo * Arpad Muranyi Micron Technology: * Randy Wolff Justin Butterfield SiSoft (Mathworks): Walter Katz * Mike LaBonte SPISim: Wei-hsing Huang Synopsys: Rita Horner Kevin Li Teraspeed Consulting Group: Scott McMorrow Teraspeed Labs: * Bob Ross The meeting was led by Arpad Muranyi. Curtis Clark took the minutes. -------------------------------------------------------------------------------- Opens: - None. ------------- Review of ARs: - Randy to investigate if/why/how a clock waveform input might be used. - In progress. - Michael M. to investigate if/why/how a clock waveform input might be used. - In progress. - Michael M. to check with IP experts on whether DC_Offset is useful for Tx. - In progress. - Mike L. to reach out to FEC presentation authors for more information. - In progress. Mike said that he had emailed three people and heard back from two of them. The two responses contained widely differing opinions. One suggested, "yes, if we had a new function we could use this to do some kind of analysis and FEC reporting." The other respondent said, "That's not going to work. There are some issues with the presumptions behind those calculations." Mike noted that a model maker can prototype this already, perhaps using the AMI_Close() function, as we had discussed in previous meetings. He noted that no one is waiting on this functionality at this time. Therefore, he suggested we should take no action on this topic until someone comes to us. Arpad noted that he had some concerns if we suggested that AMI_Close() could be used to provide the functionality. In the past there was discussion of avoiding overloading AMI_Init(), and doing extra things in AMI_Close() could cause similar confusion. Arpad noted that there was no need to discuss this issue now, but he wanted to make the point. Mike agreed, and said some models violate the limited scope of AMI_Close(). Curtis asked if this topic should be removed from the Topic bin list. Arpad and Mike agreed that it should. - Arpad to send draft_2 of the Rx_Receiver_Sensitivity clarification BIRD to the ATM list. - Done. -------------------------- Call for patent disclosure: - None. ------------------------- Review of Meeting Minutes: Arpad asked for any comments or corrections to the minutes of the February 26 meeting. Mike L. moved to approve the minutes. Randy seconded the motion. There were no objections. ------------- New Discussion: Rx_Receiver_Sensitivity BIRD draft_2: Arpad noted that he had sent out draft_2, and it is posted in the ATM archives. He said he would do nothing further with this until IBIS 7.0 is approved, then he will update the draft relative to IBIS 7.0. Enhanced C_Comp: Randy reviewed his latest draft and noted: - Tried to simplify things relative to the last draft. - Decided that supporting series elements was too complex for the C_comp proposal. - We have BIRD189 that allows us to model on-die interconnect that way. - Avoid the complexities of removing the effects of series resistance when simulating the C_comp model. - Also removed the "differential" C_comp model. - Didn't want to allow true differential C_comp modeling with this proposal, as it might have unintentionally broken some simulator algorithms. - Simplified for single-ended or pseudo-differential ([Diff Pin] pairs). Arpad noted that [External Model] is currently the only way to do true differential. The model maker would likely build all their C_comp modeling into the [External Model], and C_comp keywords are ignored when [External Model] is used. Randy continued: - Left in the description of an internal node that can be used to probe at the input buffer. Available in case the C_comp model includes a filtering circuit between the Buffer I/O terminal and the input buffer. Radek noted the phrase "voltage dependencies" at the end of the "Definition of the Issue" paragraph. He asked if that was intended to include non-linearities. Randy said this proposal was intended to allow anything you can do with IBIS-ISS syntax. Radek said we might consider modifying that language later. Randy continued: - Removed lots of language related to the series elements and the additional terminal names related to them. - Other Notes: section now includes a more complete description of the extra input buffer probing location. There was also confusion with the last draft about where clamp data would be. This explains that all the clamp data exists at the Buffer I/O terminal and not anywhere else. - Made sure Terminal_Number, File_IBIS-ISS, etc., use the exact same language as BIRD189. - There are now many fewer Terminal_Types because differential terminals and the Buffer_O node are no longer in the proposal. Bob noted the statement that IBIS-ISS subcircuit terminals "shall not contain an ideal reference node (SPICE node 0 or its synonyms)". Randy said that in last year's discussions we decided we wanted someone to choose one of the existing references in the scope of the [Model]. Bob said A_gnd can be a reference terminal in a BIRD189 interconnect model, and we might want to revisit that language. Arpad noted that since this draft duplicates so much of the text from BIRD189, we might be better off with an up-front section explaining the rules. Then the section could be referred to in multiple places. Randy noted that there were some minor differences, such as the minimum Number_of_Terminals, so while much of the text was common it might not be easy to break out a single section that applied to BIRD189 and this proposal. Bob noted that redirecting the user to another section can cause confusion, but it might be the way to go in this case to eliminate duplication. Bob noted one other difference. This proposal allows corners for parameter values in order to align with the [Model] corner. BIRD189 interconnect models are not associated with a [Model]. Randy took an AR to make a version of this draft that highlights text that is exactly the same as BIRD189. Randy reviewed the figure on page 8 that highlights all of the locations. Arpad noted that the drawing only applies to a [Model] that doesn't use [External Model]. Bob and Arpad questioned the purpose of the dotted line triangle in the figure. Randy said he included it because it's a common symbol for a buffer that's an output and an input. Randy said he was open to any suggestions for clarifying the figure. Bob and Arpad expressed some concerns about Buffer_I. Bob said it might be confusing to some and indicate an Input buffer. Arpad said the "I" always makes him think "current". At first, he suggested Buffer_In, and Randy was willing to consider that. Randy noted that Buffer_I had been used for consistency with the now removed Buffer_O. Arpad then reconsidered and thought Buffer_In might itself be misleading. He suggested Buffer_wfm, since it's just a location for the waveform we will end up using for this C_comp model. However, Randy noted that it would only be associated with the Input function. That's the only time you'd be interested in measuring the input characteristics. No alternative proposal supplanted Buffer_I. Radek asked how the clamps participate in the simulation of the Input buffer when you have the Buffer_I terminal. Randy referred to the following sentence in Other Notes: Note that [Power Clamp] and [GND Clamp] I-V table data, if present in a [Model], is assumed to be applied at the Buffer I/O terminal and not at this internal probing location. Randy noted that all clamp tables from the [Model] are applied at the Buffer I/O terminal. - Mike L.: Motion to adjourn. - Ambrish: Second. - Arpad: Thank you all for joining. AR: Randy to send out the modified draft, and Mike L. to post it to the ATM archives. ------------- Next meeting: 12 March 2019 12:00pm PT ------------- IBIS Interconnect SPICE Wish List: 1) Simulator directives